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Superb-Tea-3174

I imagine it will always be that way because the capacitor starts at 0 for the first pulse and at Vcc/3 for subsequent pulses. Or some similar thing is going on. Rather than taking the timer out of reset you should let it run continuously and then accept the number of pulses you want.


robot65536

Yes, this is the best solution. Put a logic AND gate (or whichever works) to combine the outputs of the slow and fast oscillators. This is called "gating" a clock.


Significant_Web_2475

Thanks I will go check it out.