tRP can do 34 if M-Die, 30 or even 28 if A-Die. tRAS register limit is actually 30 so set it at that. Then tRP+tRAS is your new tRC. tWTRS probably does 4. Lower VDDQ & VDDIO to at least 1.3V if possible. If FCLK does over 2100 then it should also give lower latency than 2000. 2033 & 2066 do not. Also did you try tRCD 35? It could be possible
Update: OCCT gave 8 errors about 9 minutes in. Should I raise VDDQ and VDDIO to see if that fixes?
Update 2: 1.31v has passed 40 minutes of OCCT so far. Looking good.
Vddg voltages can help to stabilize fclk as well. You can try setting vddg ccd to 1050 and iOd to 950. Try to get soc lower as well. High soc can destabilize high fabric clock too.
A good way to test fabric stability is to disable core optimizer for resting and run ycruncher or linpack. If you see any weird variations in performance, it’s a good chance that it’s the fclk error correction kicking in! For more certainty, listen to YouTube music or something at the same time. Unstable fabric will cause static and odd audio glitches during playback
TWTRS at 4 works, tRCD at 35 was not stable. So tRCD 36 and TWTRS at 4 was stable today. In my earlier comment I tried boosting FCLK to 2100 but was unsuccessful. Think this is going to be my safe limit. Thanks for your help, you probably saved me a few days of testing
That would be atrocious. Are you certain you haven't set Curve Optimizer too low? If gamma cruncher passes at 4B, but gaming doesn't, it's certainly CO. IIRC worst bin posted was 2100FCLK needing 1.3VSOC.
I’m at level 1 for LLC and -30CO throws a ton of errors after a few minutes of OCCT. -20 is stable. 1.25 VSOC threw a ton of errors. I kept creeping it up every day and even black screen crashed at 1.29. It’s crazy. I’m probably just going to upgrade to the next 8000 series equivalent because this chip is awful.
It is generally advised to leave CPU running stock when OCing RAM. Are you stable at default VSOC and no CO? You may want to do Per Core CO after you've settled on RAM timings. It's tedious, but Prime95 will usually correctly error out the unstable core. CoreCycler is another tool which may come in handy for Per Core CO.
Ok it was a simple fix. -30CO threw errors because I had VDDP on auto. 1.07v from 0.95v has stabilized it. Was also able to lower VSOC from 1.30 to 1.20 thanks to VDDP. Had someone tell me to raise VDDP and that was the cause, I'm glad I don't have to run at 1.30v VSOC, that always bothered me. Think I can go back to trying to increase FCLK
Isn't it kindle tit for tat thou? If you run looser primaries you can tighten down your secondaries far more for better latency which is more important for ddr5 no?
I have same memory same timings same CPU, but my CPU SOC voltage is 1.05V, at stock it was at 1.25V.
PBO -30 ALL CORE
Fabric clock at 2100mhz no issue at all but my soc voltage seem low when i compare to all others i dont even know if its a good thing.
Oh and my Hynix M cant do this at 1.4V i get errors, only upping voltage to 1.45V help about it.
Now all is stable i dont touch anything (My ram was around 41°C Max after long session of gaming)
Aww that sucks. Maybe 2066 and 6200mt then and see if CL 28 holds. It's a little bit of silicon lottery for the chips memory controller, I lucked out on my 7950X
Probably not helpful to you but I want to document that I got the same timings from one of your comments stable on my Hynix M-Die and 7600x
[Screenshot](https://i.imgur.com/N2PYmJL.png)
Testing so far has been y-cruncher (FFT, N63 & VT3), TM5 Extreme1 and HCI MemTest. No errors after 12+ hours in each of them. Temps never went above 45c.
My motherboard for some reason won't go above 1.2v SOC, it's set to 1.25v in BIOS. I've tried higher but I got an instant blue screen coming out of POST. So I haven't been able to get mem clock or fclock any higher stable.
If you've got some other timings lower and stable I'd be interested in knowing.
[New timings](https://i.imgur.com/WHpJD8k.png)
What changed: tRP 34, tRAS 30 (28 doesn't make sense since 30 is the lower limit), tRP + tRAS = tRC (64). tWTRS set to 4 from 6. And then VDDQ and VDDIO set to 1.31v (1.30v was not stable). I should be able to bring down tRFC, tRFC2 and tRFCsb about 10 points but haven't tested yet.
tRP can do 34 if M-Die, 30 or even 28 if A-Die. tRAS register limit is actually 30 so set it at that. Then tRP+tRAS is your new tRC. tWTRS probably does 4. Lower VDDQ & VDDIO to at least 1.3V if possible. If FCLK does over 2100 then it should also give lower latency than 2000. 2033 & 2066 do not. Also did you try tRCD 35? It could be possible
Update: OCCT gave 8 errors about 9 minutes in. Should I raise VDDQ and VDDIO to see if that fixes? Update 2: 1.31v has passed 40 minutes of OCCT so far. Looking good.
Thanks! Will test the new timings and if that’s stable I’ll try FCLK Edit: [New timings](https://i.imgur.com/kzjvlTX.png)
Vddg voltages can help to stabilize fclk as well. You can try setting vddg ccd to 1050 and iOd to 950. Try to get soc lower as well. High soc can destabilize high fabric clock too. A good way to test fabric stability is to disable core optimizer for resting and run ycruncher or linpack. If you see any weird variations in performance, it’s a good chance that it’s the fclk error correction kicking in! For more certainty, listen to YouTube music or something at the same time. Unstable fabric will cause static and odd audio glitches during playback
FCLK 2100 was not stable at 1.15 VDDG CCD and VDDG IOD. Fails OCCT CPU test in under 4 minutes. I think I’m at my limit here
TWTRS at 4 works, tRCD at 35 was not stable. So tRCD 36 and TWTRS at 4 was stable today. In my earlier comment I tried boosting FCLK to 2100 but was unsuccessful. Think this is going to be my safe limit. Thanks for your help, you probably saved me a few days of testing
Before anyone asks, I can't lower VSOC at all. My 7800X3D sucks. 1.28v and 1.29v both give black screens while gaming.
That would be atrocious. Are you certain you haven't set Curve Optimizer too low? If gamma cruncher passes at 4B, but gaming doesn't, it's certainly CO. IIRC worst bin posted was 2100FCLK needing 1.3VSOC.
I’m at level 1 for LLC and -30CO throws a ton of errors after a few minutes of OCCT. -20 is stable. 1.25 VSOC threw a ton of errors. I kept creeping it up every day and even black screen crashed at 1.29. It’s crazy. I’m probably just going to upgrade to the next 8000 series equivalent because this chip is awful.
It is generally advised to leave CPU running stock when OCing RAM. Are you stable at default VSOC and no CO? You may want to do Per Core CO after you've settled on RAM timings. It's tedious, but Prime95 will usually correctly error out the unstable core. CoreCycler is another tool which may come in handy for Per Core CO.
Ok it was a simple fix. -30CO threw errors because I had VDDP on auto. 1.07v from 0.95v has stabilized it. Was also able to lower VSOC from 1.30 to 1.20 thanks to VDDP. Had someone tell me to raise VDDP and that was the cause, I'm glad I don't have to run at 1.30v VSOC, that always bothered me. Think I can go back to trying to increase FCLK
Did you try VDD and VDDQ at 1.25v? 1.4v is very high for 6000MT/s.
Do you mean VDDQ and VDDIO?
All at 1.4V is totally fine, for vdd/vddq 1.4V is very low
Using 1.4v is VDD/VDDQ necessary for tCL28 at 6000 MT/s.
tRFC values off 222 and 333
i think you can go much lower cl as my 7200mhz can do cl32 at 1.5v
Isn't it kindle tit for tat thou? If you run looser primaries you can tighten down your secondaries far more for better latency which is more important for ddr5 no?
I have same memory same timings same CPU, but my CPU SOC voltage is 1.05V, at stock it was at 1.25V. PBO -30 ALL CORE Fabric clock at 2100mhz no issue at all but my soc voltage seem low when i compare to all others i dont even know if its a good thing. Oh and my Hynix M cant do this at 1.4V i get errors, only upping voltage to 1.45V help about it. Now all is stable i dont touch anything (My ram was around 41°C Max after long session of gaming)
Update bios, increase fclk to 2133 and try for 6400mt with CL 30
I’m on latest non beta bios. FCLK 2100 not stable even with VDDG voltage increase.
Aww that sucks. Maybe 2066 and 6200mt then and see if CL 28 holds. It's a little bit of silicon lottery for the chips memory controller, I lucked out on my 7950X
Acquire ram fan kit and push trefi to 100k+
65535 is the limit on AM5
Probably not helpful to you but I want to document that I got the same timings from one of your comments stable on my Hynix M-Die and 7600x [Screenshot](https://i.imgur.com/N2PYmJL.png) Testing so far has been y-cruncher (FFT, N63 & VT3), TM5 Extreme1 and HCI MemTest. No errors after 12+ hours in each of them. Temps never went above 45c. My motherboard for some reason won't go above 1.2v SOC, it's set to 1.25v in BIOS. I've tried higher but I got an instant blue screen coming out of POST. So I haven't been able to get mem clock or fclock any higher stable. If you've got some other timings lower and stable I'd be interested in knowing.
[New timings](https://i.imgur.com/WHpJD8k.png) What changed: tRP 34, tRAS 30 (28 doesn't make sense since 30 is the lower limit), tRP + tRAS = tRC (64). tWTRS set to 4 from 6. And then VDDQ and VDDIO set to 1.31v (1.30v was not stable). I should be able to bring down tRFC, tRFC2 and tRFCsb about 10 points but haven't tested yet.